Memory chip maker Elpida developed, 512 Mbit DDR3 memory chip beats all in the upcoming DDR3 battle with its peformance and features, the news of which is just trickling in.
History :
Both Samsung and Infineon launched their DDR3 chips before Elpida, in fact early DDR3-1066 samples from these two vendors reached the OEMs late last year already.
But these initial 512 Mbit 1.5 volt circuits aren't far ahead in performance compared to the best current DDR2 ones.
Elpida's "standard" DDR3 memory :
Meant for next-generation PCs and servers. Would be the fastest DDR3 general purpose memory chip announced till now. Achieves same transfer rates without using the newer 80nm process as used by samsung.
Elpida/Hitachi uses 8:4 data transfer multiplexer with shielded I/O lines, and dual-clock (separate for odd and even clock counts) latency counter to reduce cycle time to 1.2 ns (DDR3-1600 grade), combined with multiple on-dire termination merged output drivers.
How it helps :
Well, as DDR read two bits simultaneously from the DRAM memory array for each signal pin (i.e. for 100 MHz memory array, the outside transfer was 200 MHz per pin) and DDR2 read four bits for each signal pin, the DDR3 blanket-reads 8 bits, a whole byte, of date per each external signal pin, multiplexing 8 bits to one pin effectively using time division. So, a 200 MHz DDR3 memory array will correspond to 1,600 MHz effective outside per-pin thoughput.
Specs & Advantages :
Elpida entry tempts with substantially higher performance, where ultrahigh bandwidth was not compromised by very high latency, yet the voltage was kept very low to ensure cool, power-saving operation even at DDR3-1333 CL6 - a very nice, clock-synchronised fit to the FSB1333 "Cointreaus"?
Or maybe a dual-FSB1333 "Woodcrest" workstation variety where the improved latency and cheaper generic memory will be a preference over complicated, high-latency FB-DIMMs?
Usage Amd :
The 1.36 volts level for the memory at DDR3-1333 is just a notch above the expected 1.3 volts Vcc for the upcoming 65 nm Athlon64 and Opteron series, making the on-chip memory controller integration that much easier, since the voltage levels are almost the same for the CPU cores, memory and the upcoming HyperTransport 3.0 links which will again double the data rate per port.
After all, a dual-channel low-power, low-latency DDR3-1333 memory system would give you 21 GBytes/s of peak bandwidth, and probably close to, say, 18 GB/s Sandra memory benchmark if it was running via on-chip memory controller of a hypothetical 2007 Athlon64 CPU.
Lauch :
The DDR3 is still a year away from first mainstream PC implementations, do expect the initial support to appear late this year, in combination with volume production of these first chips from Elpida, Samsung and Infineon.
The market researchers iSuppli expects DDR3 DRAM to finally replace DDR2 as the main volume product only in 2008, with a projected 55 percent market share that year.
History :
Both Samsung and Infineon launched their DDR3 chips before Elpida, in fact early DDR3-1066 samples from these two vendors reached the OEMs late last year already.
But these initial 512 Mbit 1.5 volt circuits aren't far ahead in performance compared to the best current DDR2 ones.
Elpida's "standard" DDR3 memory :
Meant for next-generation PCs and servers. Would be the fastest DDR3 general purpose memory chip announced till now. Achieves same transfer rates without using the newer 80nm process as used by samsung.
Elpida/Hitachi uses 8:4 data transfer multiplexer with shielded I/O lines, and dual-clock (separate for odd and even clock counts) latency counter to reduce cycle time to 1.2 ns (DDR3-1600 grade), combined with multiple on-dire termination merged output drivers.
How it helps :
Well, as DDR read two bits simultaneously from the DRAM memory array for each signal pin (i.e. for 100 MHz memory array, the outside transfer was 200 MHz per pin) and DDR2 read four bits for each signal pin, the DDR3 blanket-reads 8 bits, a whole byte, of date per each external signal pin, multiplexing 8 bits to one pin effectively using time division. So, a 200 MHz DDR3 memory array will correspond to 1,600 MHz effective outside per-pin thoughput.
Specs & Advantages :
- 512 Megabit DDR3 SDRAM
- Column access time of 8.75 ns (CL7 latency)
- Data transfer rate of 1.6 Gigabits per second (Gbps)
- 1.5v DDR3 voltage level.
- 90 nm CMOS
- Saves electricity compared to the DDR2.
- Matches the best DDR2 parts in latency, and beats them twice in bandwidth, yet runs at or below 1.5 volts.
- Even at lower 1.36 volts, the RAM runs fine at 1.333 GHz (DDR3-1333) grade with CL6 latency (8.4 ns total CAS time), which matches the CAS time of the fastest current DDR2 memory, the Corsair 5400UL (DDR2-667 CL3) at 1.9 volts.
Elpida entry tempts with substantially higher performance, where ultrahigh bandwidth was not compromised by very high latency, yet the voltage was kept very low to ensure cool, power-saving operation even at DDR3-1333 CL6 - a very nice, clock-synchronised fit to the FSB1333 "Cointreaus"?
Or maybe a dual-FSB1333 "Woodcrest" workstation variety where the improved latency and cheaper generic memory will be a preference over complicated, high-latency FB-DIMMs?
Usage Amd :
The 1.36 volts level for the memory at DDR3-1333 is just a notch above the expected 1.3 volts Vcc for the upcoming 65 nm Athlon64 and Opteron series, making the on-chip memory controller integration that much easier, since the voltage levels are almost the same for the CPU cores, memory and the upcoming HyperTransport 3.0 links which will again double the data rate per port.
After all, a dual-channel low-power, low-latency DDR3-1333 memory system would give you 21 GBytes/s of peak bandwidth, and probably close to, say, 18 GB/s Sandra memory benchmark if it was running via on-chip memory controller of a hypothetical 2007 Athlon64 CPU.
Lauch :
The DDR3 is still a year away from first mainstream PC implementations, do expect the initial support to appear late this year, in combination with volume production of these first chips from Elpida, Samsung and Infineon.
The market researchers iSuppli expects DDR3 DRAM to finally replace DDR2 as the main volume product only in 2008, with a projected 55 percent market share that year.
