Intel on a Roll at IDF

dipdude

Forerunner

Quad-core 65nm Kentsfield, dual core 65nm Conroe and 65nm Pentium D

The Intel Developer Forum (IDF) is an event held twice a year where software and hardware developers can get together to discuss the latest technology and future goals and roadmaps that Intel is planning. This year, the IDF was held in San Francisco.

Today at the Intel Developers' Forum, chief technology officer Justin Rattner heralded the public introduction of its next generation of 65 nm processor micro-architectures :
  • Conroe (Desktop)
  • Merom (Mobile)
  • Woodcrest (Server)
For the desktop, Intel will ship a processor code-named Conroe in the third quarter that brings a 40 percent performance boost while reducing power consumption by 40 per cent when compared to the Intel Pentium D processor 950.

Server customers will see the new architecture appear with a chip called Woodcrest in the second half of this year. Woodcrest should deliver even more impressive gains, upping performance by 80 per cent while cutting power by 35 per cent when compared to a dual-core Xeon running at 2.8 GHz with 2x2MB of cache.

A little bit later, Intel will produce the Merom processor for notebooks with similar performance stats.

The new Intel Core Microarchitecture represents "the next-generation of Intel," in keeping with the emerging theme of "Intel 3.0."

Intel Core Microarchitecture

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Intel's Core architecture bullets

The Core architecture has four issue execution with a fourteen stage pipeline. Rattner focused on five new technologies that will make Core different than previous architectures like Netburst :
  1. The wider issue execution was obviously the first and most important announcement.
  2. Conroe will also feature a new 128-bit SSE optimization that will allow all SSE instructions to be completed in a single cycle.
  3. Core architecture will have micro-ops fusion (already present on all modern Intel processors), but that the new architecture will also include macro-ops fusion. Essentially, macro-ops fusion takes multiple high level instructions, and combines them into a single instruction. For example a “compare†and “jump†instruction can be combined into a single operation.
  4. Core will feature shared L2 cache for all of the next generation processors – including the quad core Kentsfield/Clovertown and dual core Conroe/Merom.
  5. Intel has completely redesigned the scheduler to prevent collisions with the added bonus that advanced memory management leaves the door open to advanced gating techniques. In a nutshell, the new gating techniques will dynamically power certain portions of the CPU on and off on the fly.
The new Core Microarchitecture, Rattner said, promises to "combine the energy efficiency of Core Duo with the performance of top-of-the-line processors."

With the arrival of the Woodcrest platform for servers, he remarked, new CPUs will now consume only 33% of the power for an entire server. One way the company will be reducing the CPU's drain on power, he announced, is by decoupling display refresh cycles from system memory, enabling them to draw upon dedicated display memory instead. Exactly how Intel would achieve this, or whose heads he would have to pummel at ATI and Nvidia to make this happen, Rattner did not say.

For his part, Gelsinger called the ICM architectures "not just a minor retooling, [but] the biggest leap in micro-architecture for Intel so far...the best processor we've ever built." Look for a new metric, called Efficiency Per Instruction (EPI), which Intel will be introducing to measure the relative performance of new processors, in the absence of the former gigahertz scale. Using this new system, Gelsinger said, "we will be better than any other processor, based on data sheets published today."

As an example of this efficiency, Gelsinger noted that front-side bus speeds may now be cranked up to 1333 MHz for Conroe-architecture systems, while at the same time, power efficiency is being brought down to levels not seen since the 486.

Conroe​

Conroe Die Shot :


Dual-cores, lots of cache

While the diagram is very low resolution, it shows that Conroe is definitely slated to run on the Intel 975X family of chipsets. The chipset itself supports DDR-2 memory, one PCIe 16x or twin 8x slots and will remain as Intel's flagship through a good part of this year. L2 cache makes up a significant portion of Conroe's silicon space.

Conroe Block Diagram :


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Conroe uses a shared L2 cache with independent L1 caches per core

Details :

Rattner gave attendees the briefest of peeks at examples of two Conroe-derived quad-core desktop platforms, Kentsfield for desktop packaging and Clovertown for server packaging (Xeon). Both processors will feature a pair of dual-core dies sandwiched together, and supplied with 4 Mb of on-board L2 cache.

Conroe-based products, Rattner predicted, will perform 40% faster than systems running the Pentium D 950 processor, while at the same time consuming 40% less power.

At the same time, Woodcrest chips utilizing what we had better start getting used to calling "ICM," will run 80% faster than today's 2.8 GHz Paxville dual-core chips, while consuming 35% less power. And future Merom mobile platforms, he added, will perform 20% faster than today's Core Duo T2600, while consuming the same power.

Performance :

A representative from Microsoft came on stage to demonstrate today's Pentium D versus Conroe running a simulation on the next version of Excel 2007. The team has added a great deal of multithreading to Excel, delivering a 300 percent improvement over the Pentium D. Vista has focused on adding lots of background services: eye candy, desktop search, and so forth. Conroe and the Avril (dual core and associated chipsets) platform have been developed and optimized to enable those benefits.

AnandTech today had an hour alone with Conroe and an overclocked AMD Athlon 64 FX-60. Intel had two systems available for testing: the first computer was an Athlon 64 FX-60 overclocked to 2.8GHz running on a DFI RD480 motherboard. The other system was a Conroe running at 2.66GHz on an Intel 975X motherboard. Anand compared several video games: Quake 4, Half Life 2 - Lost Coast, Unreal Tournament 2004, and F.E.A.R. Along with the video games, Windows Media Encoder 9, DivX 6.1, and iTunes 6.0.1.3 were also tested.
While we're still comparing to Socket-939 and only using RD480, it does seem very unlikely that AMD would be able to make up this much of a deficit with Socket-AM2 and RD580. Especially looking at titles like F.E.A.R. where Conroe's performance advantage averages over 40%, it looks like Intel's confidence has been well placed.​
When the tests were finished, it is now obvious that AMD will have a lot of work to do if it wants to try and match the performance from Conroe.

Conroe Benchmarks Updated :

BIOS issues and other concerns are addressed



Anandtech was able to score a second session with Intel's Conroe and an overclocked AMD FX-60. Some concerns and issues were raised concerning the first test, so Anand addresses them with this update.

The performance picture with regards to Conroe hasn’t really changed all that much - on average we’re still seeing a bit over a 20% increase in performance over an overclocked Athlon 64 FX-60. While it’s worth noting that these results should be taken with a grain of salt, we really were not able to determine any cause for suspicion based on Intel’s setups. The machines were as clean as they could get, with the BIOS oversight having no tangible impact on most performance.

After this second round of tests, there doesn't appear to be anything malicious or underhanded going on Intel's part. The BIOS had little to no effect on performance and the Conroe still comes out on top. Now all we have to do is wait for AM2 Athlons.
Merom

2006 - 2007 Mobile Platform Roadmap :

Merom will operate in the very same power envelope as Yonah does, meaning that power consumption will stay constant while performance goes up. This also makes it easier for OEMs to simply start shipping their existing Core Duo designs with Merom instead of Yonah, avoiding a lengthy and costly ramp up of Merom just months after Yonah really started shipping in volume.



In 2007 Intel will replace Napa with the Santa Rosa platform, also featuring Merom but with a new chipset (Crestline and ICH8M) as well as a new wireless solution called Kedron. Merom will be given a faster FSB on the Santa Rosa platform (most likely 800MHz or 1066MHz), but will otherwise remain unchanged from what launches later this year.



The Crestline chipset will include the next generation of Intel's integrated graphics. The new ICH8M will feature 10 USB 2.0 ports and 3 SATA ports. On the wireless side, Kedron will support 802.11n as well as 802.11b/g.



Merom platforms would offer more than a 20% increase in performance relative to the current Core Duo T2600 (2.16GHz) processors with no impact on power consumption. During a separate briefing, Intel's Mooly Eden showed a benchmark pitting a Dell Core Duo system against the same system with a Merom processor (Eden literally swapped out the Core Duo CPU and stuck in a Merom processor, partly to showcase its backwards comptability).

The benchmark was a custom Quake 4 timedemo, with the Core Duo system scoring 106.6 fps while the Merom system scored 134 fps: advantage Merom by just over 25%. We don't know any of the specifics of the settings on the systems, other than they were claimed to be identical. Given the results we've seen with Conroe on the desktop, this sort of a performance increase does not seem out of the ordinary.
Rivals

The new architecture will present a big challenge for Opteron.

Basically, AMD appears to have about six months to hawk Opteron as hard as it can before Intel reaches performance parity or even stretches past AMD. Intel officials believe that Woodcrest will consistently outperform the new 2.6GHz Opteron from AMD and that similar scenarios will hold true on the desktop and with laptops.

A lot of attention had been paid here and elsewhere to AMD's use of an integrated memory controller and Hyptertransport to take a large performance lead over Intel. Instead of copying AMD, Intel has worked to tweak various knobs in its current designs to catch up with its rival.

Such advances include Wide Dynamic Execution that allows Intel chips to crunch through more instructions per clock cycle, improved power management tools, larger caches, faster front side buses, and Advanced Digital Media Boost, which allows 128-bit SSE, SSE2 and SSE instructions to be executed within one clock cycle.

Industry analysts believe that this collection of advances has put Intel back on the performance map. "They have cranked a lot of knobs," said Kevin Krewell, editor in chief of the Microprocessor Report. "They have compensated for not having an on-chip memory controller.

AMD will likely retain its edge with four-socket servers and above that make use of AMD's more scalable memory architecture. Intel, however, will put enormous pressure on AMD in the two-socket server market, which makes up the vast majority of system sales.

The "Core" architecture will put AMD to the test in a massive, massive way. AMD cannot afford any miscues moving forward and really needs to show something spectacular and surprising at this point to counter Intel's product and marketing efforts.

Problem Areas

The only downside for Intel appears to be possibly higher costs for the future products.

"The Intel chipset is much more complex," Krewell said. "What they don't talk about is that the cost of the chipset will go up significantly."

Intel still has much to prove given that the "Core" designs remain locked on PowerPoint slides. Benchmarks won't arrive en masse for several months.

Launch Dates

Intel will start shipping its "Sossaman" low voltage version of Xeon next week. By the end of the month, Intel will ship "Dempsey," which is the follow on to "Paxville" aimed at dual-processor servers.

Conroe and Woodcrest are due to ship in the second half of 2006. In early 2007, Intel will back up these two-socket products with "Clovertown", a four-core dandy.

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Update

Intel plans 32nm processors for 2009, 45nm for 2008

And investigates technology to replace the transistor by 2012​


45nm testbed with 12 inch wafers

Intel will move to 32nm processors in 2009, and is investigating the use of carbon nanotubes to replace transistors as it designs the smaller multi-core processors expected at regular two year intervals in the future.

Currently, Intel is in the process of moving from 90nm to 65nm processors, with all its new chips – Conroe, Merom and Woodcrest – being built to the size from later this year. Early next year it will introduce 45nm processors, and at that point double the cores in a processors from two to four.

Each time the company reduces the die size, the number of cores will double. After it has introduced 32nm CPUs, it hopes to move over to 22nm die in 2011, with 11nm in 2013. A spokesman for Intel said the company had transistors in its laboratories at those sizes, but the difficulty it was facing was how to make them.

The new 45nm CPUs double the transistor density, putting over one billion of them on a single die. The continual reduction of the wafer means that eventually the transistors cannot be shrunk any further and efficiently move the electrons around.

Carbon nanotubes
So it is investigating a range of alternative technologies to replace the transistor in future, including tri-gate and 3D transistors and carbon nanotubes. Intel's interest is in part because improving switching speeds by 20 per cent has a profound effect on the performance of a processor.

Carbon nanotubes have been around since 1991, but were not fully investigated until 20 years later. Now Intel believes they have the potential to solve the problem of producing conductive materials on smaller die. This is because they are a single molecule tube that is very conductive.

Intel, said progress was happening, with their conduction already rising from 70 per cent to 95 per cent. He said the technology was on track for release between 2012 and 2015.

By which time, in theory Intel could be producing processors with 64 cores on a single die.

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Update

Intel Upgrades Its Platforms Alongside New Chips

Platforms will build on efficiency gains of new dual-core processors​

Intel will roll out a succession of computing platforms that build on the efficiency gains it achieved with a new family of dual-core processors, company executives announced.

They range from the Bensley and Caneland server platforms to the Glidewell workstation platform, the Bridge Creek digital home platform, and Averill digital office platform.

Intel claims it has achieved great increases in power efficiency with its 65-nanometer family of dual-core chips, all using the company's new Core microarchitecture: the Merom, Conroe, and Woodcrest processors.

More Power Efficiency and Multiple Cores
A typical server running Intel's current Xeon processor draws about 48 percent of its electricity for the processor and 52 percent for the platform. But using the new, 65-nanometer Woodcrest chip, that split will change to just 33 percent for the processor, and 67 percent for the platform, he said. Efficiency gains of that magnitude will change the ways that engineers seek better platform performance.

Intel's new Xeon-based platform, code-named Bensley, will begin with the Dempsey processor, scheduled to ship by the end of March. The system is designed for performance-per-watt efficiency.

Dempsey won't last long; by the third quarter of 2006, Intel plans to update Bensley with the Woodcrest processor. That change will further reduce power consumption by 35 percent while delivering greater than 80 percent improvement in computing performance, the company claims. Then Intel will update Bensley yet again in early 2007, when it releases the quad-core Clovertown processor.

Also in the server market, Intel next week will ship the ultra-low-power, dual-core Sossaman processor, designed for server blades, storage devices, and telecommunications equipment. And by 2007, Intel will ship the quad-core Tigerton processor, designed to work in the Caneland server platform.

Desktops, Mobile
For desktop jobs, Intel plans to use its new Conroe processor in Bridge Creek, its Digital Home platform, and in Averill, its Digital Office platform, due in the second half of 2006. Conroe will ship in the third quarter of 2006. Averill will combine the Conroe processor with a new chip set code-named Broadwater, along with functions like IT security, virtualization, and active management.

Customers who run high-end desktop applications may want to wait until the first quarter of 2007, when Intel will release its quad-core Kentsfield processor.

Intel is also planning to improve its mobile platform. The company's new Core microarchitecture-based processor for mobile applications--Merom--is designed to work within the Centrino Duo platform. Intel hopes to ship Merom chips in time for the 2006 holiday buying season.

Servers and Workstations
Intel thinks those power-efficient, multicore processors are appropriate for nearly every sector of the server marketplace.

"By the end of the year, over 85 percent of our server platforms will be dual-core," said Pat Gelsinger, senior vice president and general manager of Intel's Digital Enterprise Group.

For workstation applications, Intel plans to release the Glidewell platform, also designed to use Woodcrest processors today and Clovertown processors tomorrow. Both Bensley and Glidewell are targeted for introduction in the second quarter of 2006.
 
Yup, the conroe just blew away the FX-60 and I did'nt expect Intel to hit back this quick. Santa Rosa and Merom are promising enough to keep Intel on top of the mobile market too.
 
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