Nehalem news thread

[MAGNeT]

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Nehalem is based on the Core 2 architecture
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Refurbished, but enhanced
We will tell you a bit more about Nehalem as Intel has confirmed that Nehalem can come as 2 to 8-core designs, and that each core supports multi-threading, which can cope with two software threads simultaneously.

It is the most scalable and dynamic design made by Intel and you can make a variety of products based on it, so you can expect dual-core, quad-core and eventually eight-core, but you shouldn’t exclude the six-core version, either.

The first Nehalem to launch in Q4 2008 has four cores with eight threads and Intel said that the cores inside are derived from an advanced version of the Core 2 Penryn 45nm generation.

Therefore, Nehalem is derived from the Core 2 marchitecture, but the new Nehelam core has 128 instructions, compared to 96 instructions for the original Core 2 Duo.

Intel has increased the parallelism by some 33 percent, enhanced the algorithms that will enable faster access to cache and has implemented some branch prediction enhancements.

When you take all this into account, the Nehalem should end up significantly faster by some 20 to 30 percent compared to a Core 2-based 45nm processor at the same clock.

Fudzilla - Nehalem is based on the Core 2 architecture

[MAGNeT]

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Nehalem supports only DDR3

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No DDR2

Intel has revealed to the world that the upcoming Nehalem generation of processors will only support DDR3 memory. As the memory controller is now in the CPU and the Northbridge as we knew it from Intel’s past and present will cease to exist, it won’t be that easy to change the memory controller in order to support DDR2.

At this point, it looks like Nehalem will only support DDR3, but we wouldn’t be surprised if Intel makes a version of Nehalem to support registered DDR3 or FBDIMMs as this is what the server market needs.

As Nehalem launches as a high-performance desktop part and a workstation/server part in Q4 2008, the DDR3 prices are likely to come down to more acceptable rates.

Currently, DDR3 just can’t compete with the ultra cheap DDR2 memory and motherboard manufacturers are still making high-end X48 motherboards with DDR2 support.

Fudzilla - Nehalem supports only DDR3

[MAGNeT]

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Nehalem looks like an advanced K10 / Barcelona

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Shared L3 cache and integrated memory controller

Nehalem is a scary word that promises a huge step forward in the CPU business, but in reality it is something that we’ve already seen, years ago.

The four cores inside are modified Core 2 45nm Penryn cores, the integrated memory controller is something that we saw with the K10 / Barcelona and Agena CPUs a while ago, and the shared L3 cache for all four cores is definitely something that we’ve seen from the Barcelona / K10.

Yesterday’s conference call with Intel reminded us of a conversation that we had with some Intel engineers in the Summer of 2007 when they said that the K10 is a great concept, but it is tough (impossible) to make at 65nm. They used these words: we (Intel) cannot make the K10 in 65nm and Intel is known to have the best transistors in the word.

This now makes perfect sense, as Nehalem at its 45nm really looks like an advanced version of the K10 with integrated memory controller and L3 cache, but to be fair to Intel, Nehalem can cope with two threads per core and AMD’s K10 and K10.5 cannot.

So, Nehelem is actually a new glimmer of hope for the K10.5, the new 45nm generation from AMD, as if Nehalem can work well at 45nm, there is a big chance that the K10.5 might be a success.

Fudzilla - Nehalem looks like an advanced K10 / Barcelona

[WingZero]

^^seems promising…

[Sasuke_Itachi]

Shud get one of those 8 cores:)

[nsan-ty]

Hmm…20-30% faster at sameclock…but does it actually run at the same clock

[MAGNeT]

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Nehalem has 8MB of L3, 4x256KB L2

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We have already told you a lot about Nehalem, but let me repeat some of the information. It is a scalable design and it can come as two to eight-core product.

The first to come will be a four-core unit that will share 8MB of total cache. Compared to Deneb, AMD’s 45nm quad-core, Nehalem has 2MB more cache, but less L2 cache.

Nehalem has 256KB of L2 cache per core and 32KB cache for data and 32KB of L1 cache for instructions per core while Deneb has double of that or 512KB of L2 and 2x64KB L1 cache.

This is what it looks like, and let’s just hope that Intel won’t run into a TLB problem. Well, if they do, they can always ask AMD how to fix it, at least they know how to do that by now.

Fudzilla

[MAGNeT]

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Nehalem to have graphics inside

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Intel said that Nehalem is scalable and modular and in one of the slides it revealed something called iGraphics.

This is definitely proof to our story that Nehalem will have some kind of a graphics core inside, but we are not sure if this is the case with all or just with some of the CPUs. This decision probably comes as the Northbridge becomes less relevant, as the memory controller is now in the CPU and the only thing you really need the Northbridge for are the PCIe lanes.

Fudzilla - Nehalem to have graphics inside

[MAGNeT]

Nehalem is the riskiest move Intel made

In the last five years

We learned that Nehalem is the most significant and yet most dangerous marchitecture move that Intel made in the last five years.

It sure is a holy grail of AMD’s ideas wrapped around an Intel product and having the integrated memory controller and L3 cache in a single processor makes a lot of space for errors.

We don’t say that Nehalem will have problems or that it will be late, but we can say that Intel is risking like never before and most of the stuff it uses has been seen in AMD’s CPUs. The only big advantage Nehalem has over Denab is its Hypertheading support but this is something to be seen to believed.

Nehalem will launch as a single $1100 CPU in Q4 2008 and it will find its place in server market but it will take until middle 2009 to take the significant market share out of the Penryn core quad / duo generation. Intel tends to make our life easier as it tends to repeat the same pattern all over again.

Fudzilla - Nehalem is the riskiest move Intel made