CPU/Mobo Difference between native dual core and non-native dual core

C

cyrux

Adept
Can somebody state out the differences between a dual core processor (non native) and a native dual core processor preferably with a diagram. The difference in their architecture . To what i know is, non native dual cores (or quad cores) are generally two single core (or native dual core) processors mounted on the same die and connected by a FSB. So how is it like in the native dual core ? Do all the cores share the same set of registers or something like that

More over, the pentium d 805,840 ,940 series are all non - native dual core processors ?
 
Non-native dual core processor,
Classic example is a Smithfield,Pentium D 8xx,which consist of two independent Prescott cores combined on a single silicon die with an arbiter to share the FSB.

des2.gif


It can be a MCM (Multi chip module),Classic example is a presler aka Pentium D 9xx,in this case two cedar mills (6xx P4) are bolted together and packaged,there are two separate dice . Kentsfield uses the same technique for quad core .
In both cases L2 cache is not shared,Each die can be considered as a single cpu,so there is only a 800MT/s FSB (1066MT/s in EE) to feed data to both core's,so there will be a performance hit in application that use coz each core gets half each.

intel-core2duo-diagram-440x370.jpg


Couldnt get a better pic,sorry :p

L2 is shared in case of core architectures,but there are two separate execution cores,both core can communicate with each other without going out of processor..

Athlon X2 is a bit different
http://xs414.xs.to/xs414/07130/scheme.jpg

Key Architectural Features
 
Thx for the pics

The second pic attached is of the presler right ?

From the amd x2 pic , i can conclude that , the difference between the native and dual core processor is that , both have two cores, and in a native core there is a HT link which has a system bandwidth of 8Gbps , while in a non native processor the fsb is limited to 800MT/s which seems to form the bottle neck ?

Is that all or am i missing something ?
 
The second pic is of core2,remember even in presler L2 is not shared.

First of ,this 'native' thing is nothing but PR BS IMHO.

Native dual core is one thats designed to be dual from ground up,maybe also say two processing cores in one die which can communicate with each other and sharing of L2s..

Notice in both native dual cores cores can communicate with each other without going outside the die.The system bus can be dynamically shared between the cores unlike smithfield/presler.

Another thing HT is limited to AMD platform as you might know.

Core 2 still uses only 1066MT/s FSB..
 
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