Linux Parallella: A Supercomputer For Everyone

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Level I
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Parallella Computer Specifications
Overview:
  • Zynq-7020 Dual-core ARM A9 CPU
  • 16 or 64-core Epiphany Multicore Accelerator
  • 1GB RAM
  • MicroSD Card
  • 2x USB 2.0
  • 4 general purpose expansion connectors
  • 10/100/1000 Ethernet
  • HDMI port
  • Ships with Ubuntu OS
  • 3.4″ x 2.15″ form factor
Once completed, the 66-core version of the Parallella computer would deliver over 90 GFLOPS on a board the size of a credit card while consuming only 5 Watts under typical work loads. For certain applications, this would provide more raw performance than a high end server costing thousands of dollars and consuming 400W.
To get an idea just how powerful this little board will be, check out benchmark scores for the Epiphany-IV and Epiphany-III processors at coremark.org or read the Adapteva blog post.
For more detailed information see:
  • The Parallella Reference Manual (PDF)
  • The Parallella Platform Reference Design (link)
Click to expand...
http://www.parallella.org/
http://www.kickstarter.com/projects/adapteva/parallella-a-supercomputer-for-everyone
 
Interesting. I can't find any architectural information. I hope all those people haven't pledged USD900k without looking at the architectural specs of the coprocessor. There are several similar research focussed processors from Intel such as the SCC I and SCC II and the super flop Larabee which all promised such theoretical peak performance numbers but were never achieved in the real world because programming on them was a b**ch.

The program that they're demonstrating is an embarrassingly parallel matrix multiplication program. I'd like to see a benchmark where there's more loop carried dependencies and cache thrashing. What they've essentially built is a cellphone or tablet. Samsung and Apple do a much better job of that.

Ambitious project, and I hope they do well, but I don't see that happening with the current design.
 
tifosi said:
Interesting. I can't find any architectural information.
Click to expand...
The Epiphany architecture defines a multicore, scalable, shared-memory, parallel computing
fabric. The Epiphany architectures is comprised of a scalable 2D array high performance super-scalar floating point RISC processors, a distributed 32-bit shared memory model, and a low latency mesh Network-On-Chip interconnect fabric. The Epiphany architecture reference manual describes the architecture completely and openly and is written for system developers and programmers. Together with the Epiphany SDK reference manual it should provide all the necessary information needed to design a high performance system.
Click to expand...
​
 
They have a C compiler they ship with it. Remains to be seen how well it works in the real world.
More than the hardware, it's the principles behind parallel programming that have been a b**ch. Someone needs to create a truly auto-parallelizing compiler for that.
 
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