muzux2
Forerunner
As you have seen AMD if firing on all cylinders. Not only are they dominating the field if just about every benchmark. If this is just a preview release and the final silicone is yet to be case the future does indeed look much brighter for AMD. Unfortunately we were not able to procure Intel fancy new Core i7 980X. Maybe with a site name AMDZone, they are scared that we would give a biased review, who can blame them? However with the trouncing that the Bulldozer is giving the i7 975 two extra cores / four threads won’t make much of a difference.
I would like to thank Dresdenboy for is in depth analysis of the core changes, Abinstein and AussieFX for their review of the article, Chirs Tom for testing and the use of his site, to myself for pulling an all a few all niters to get the site ready and to get this article d
one on time, to John Fruehe for setting us up with the system and to anyone else I forgot.
Finaly if all else fails AMD's Bulldozer has an aggressive cache system.
L0 cache: 4 kB (8-way associative) trace cache for each thread (or core)
L1 cache: 16 kB (4-way) data cache per core 1 cycle latency and 128 kB (4-way) instruction cache per module
L2 cache: 2 MB (8-way) per module (shared between two cores), full-speed
L3 cache: 8 MB shared between all cores, the L3 cache with a latency of 24 cycles will be able to serve up to 2 requests per (NB) clock cycle simultaneously and transfer data with 16B/clock to each of the reciepients.
L4 cache: AMD has also announced that all Black Editions and Opterons models will come with 32/64MB L4 cache made possible through chip stacking.But now a bit more about the details. The instruction fetch unit (IFU) fetches code from the L1 instruction cache (at 32 Bytes/cycle).

AMDZone
go AMD go :hap2: