SMP: Allowing 2 CPUs, 0 hotplug CPUs
PERCPU: Allocating 36864 bytes of per cpu data
NR_CPUS: 16, nr_cpu_ids: 2, nr_node_ids 1
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 502102
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Initializing CPU#0
xsave/xrstor: enabled xstate_bv 0x3, cntxt size 0x240
Detected 2094.972 MHz processor.
Checking if this processor honours the WP bit even in supervisor mode...Ok.
Calibrating delay loop (skipped), value calculated using timer frequency.. 4189.94 BogoMIPS (lpj=8379888)
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 1024K
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
using mwait in idle threads.
Checking 'hlt' instruction... OK.
CPU0: Intel Pentium(R) Dual-Core CPU T4300 @ 2.10GHz stepping 0a
Booting processor 1 APIC 0x1 ip 0x6000
Initializing CPU#1
Calibrating delay using timer specific routine.. 4189.45 BogoMIPS (lpj=8378918)
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 1024K
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 1
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#1.
CPU1: Intel Pentium(R) Dual-Core CPU T4300 @ 2.10GHz stepping 0a
checking TSC synchronization [CPU#0 -> CPU#1]: passed.
Brought up 2 CPUs
Total of 2 processors activated (8379.40 BogoMIPS).